The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventor(s), to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Electronic devices utilize packages made up of semiconductor dies where the semiconductor dies are arranged and configured to perform various functions. For example, in a package, one semiconductor die may be configured as a system on a chip (SOC) while another semiconductor die may be configured as a memory die. The SOC die and the memory die are then interconnected to perform various functions for an electronic device that houses the package. The semiconductor dies in these packages often generate large amounts of heat. Additionally, the semiconductor dies need access to power (VDD) and ground. Thus, in creating and designing such packages, there are many trade-offs including, cost, heat dissipation and access to VDD and ground, as well as interconnectivity among the semiconductor dies within the package.